Design Verification

  • Module / Full Chip
  • Coverage driven/ assertion-based verification
  • Power aware design & verification
  • Gate-level simulation
  • LEC

Physical Design

  • Synthesis Design Partitioning
  • Place and route Timing
    closure
  • EM, IR, Leakage, Dynamic
    power
  • Physical Verification

Netlist to GDSII​

  • Full Ownership
  • Resource Augmentation
  • Technology Migration

AI-ML

  • Development and
    integration
  • LLMs
  • Data-driven solutions

DFT

  • Module / Full Chip
  • Coverage driven/ assertion-based verification
  • Power aware design & verification
  • Gate-level simulation
  • LEC

Circuit Design

  • Synthesis Design Partitioning
  • Place and route Timing
    closure
  • EM, IR, Leakage, Dynamic
    power
  • Physical Verification

Embedded

  • Developed a few IoT
    products
  • Worked on a few
    embedded products using
    ARM platform.

Fabrication and Packaging

  • Fabrication and Packaging
    Layout services.